The Fifth IASTED International Conference on
Circuits, Signals and Systems
CSS 2007

July 2 – 4, 2007
Banff, Alberta, Canada

TUTORIAL SESSION

Configurable Processors for SOC Design

Dr. Zoran Stamenkovi?
IHP GmbH, Germany
stamenko@ihp-microelectronics.com

Abstract

fiogf49gjkf0d

Objectives

fiogf49gjkf0d

Timeline

fiogf49gjkf0d

Tutorial Materials

fiogf49gjkf0d

Target Audience

fiogf49gjkf0d

Background Knowledge Expected of the Participants

fiogf49gjkf0d

Qualifications of the Instructor(s)

fiogf49gjkf0d

Tutorial Session Portrait

fiogf49gjkf0d
Dr. Zoran Stamenkovic received his Ph.D. degree in electronic engineering from the University of Nis, Serbia in 1995. His research interests include IP based SOC design, HDL modeling and simulation, logic synthesis, chip layout, and integrated circuit yield modelling and prediction. Currently, he is designing and implementing wireless SOCs at IHP GmbH, Frankfurt (Oder), Germany. He has published a book on IC yield and more than 40 scientific papers.

References

[1] 
fiogf49gjkf0d